Field Programmable Technology Implementation of Target Recognition Using Geometric Hashing

The task of identifying objects in images is a common requirement for many image processing systems. The identification of these objects (also called models) is in some contexts called automatic target recognition (ATR). Target Recognition algorithms are well suited to hardware field programmable gate array (FPGA) implementations because of their extensive use of bitlevel operations and their amenability to fine grain parallelism. Previous FPGA implementations have focused on full pixel comparison; which has very high algorithm complexity. This paper presents an alternate target recognition implementation for FPGAs of the geometric hashing (GH) algorithm. The GH algorithm has lower complexity for ATR where there are many possible objects to recognise in the scene because it is able to identify all rotations and dialations of all models simultaneously. Our implementation is novel in that it uses a memory pipeline processing (MPP) architecture to improve the concurrency of compute intensive components of the GH algorithm.